32
2552K–AVR–04/11
ATmega329/3290/649/6490
serves as clock output. If the System Clock Prescaler is used, it is the divided system clock that
is output when the CKOUT Fuse is programmed.
8.8
Timer/Counter Oscillator
ATmega329/3290/649/6490 share the Timer/Counter Oscillator Pins (TOSC1 and TOSC2) with
XTAL1 and XTAL2. This means that the Timer/Counter Oscillator can only be used when the
calibrated internal RC Oscillator is selected as system clock source. The Oscillator is optimized
for use with a 32.768kHz watch crystal. See Figure 8-2 on page 28 for crystal connection.
Applying an external clock source to TOSC1 can be done if EXTCLK in the ASSR Register is
description on selecting external clock as input instead of a 32kHz crystal.
8.9
System Clock Prescaler
The ATmega329/3290/649/6490 system clock can be divided by setting the Clock Prescale
Register – CLKPR. This feature can be used to decrease power consumption when the require-
ment for processing power is low. This can be used with all clock source options, and it will affect
the clock frequency of the CPU and all synchronous peripherals. clk
I/O, clkADC, clkCPU, and clk-
FLASH are divided by a factor as shown in Table 8-11 on page 34.
8.9.1
Switching Time
When switching between prescaler settings, the System Clock Prescaler ensures that no
glitches occur in the clock system and that no intermediate frequency is higher than neither the
clock frequency corresponding to the previous setting, nor the clock frequency corresponding to
the new setting.
The ripple counter that implements the prescaler runs at the frequency of the undivided clock,
which may be faster than the CPU’s clock frequency. Hence, it is not possible to determine the
state of the prescaler – even if it were readable, and the exact time it takes to switch from one
clock division to another cannot be exactly predicted.
From the time the CLKPS values are written, it takes between T1 + T2 and T1 + 2*T2 before the
new clock frequency is active. In this interval, 2 active clock edges are produced. Here, T1 is the
previous clock period, and T2 is the period corresponding to the new prescaler setting.
8.10
Register Description
8.10.1
OSCCAL – Oscillator Calibration Register
Bits 7:0 – CAL7:0: Oscillator Calibration Value
The Oscillator Calibration Register is used to trim the Calibrated Internal RC Oscillator to
remove process variations from the oscillator frequency. A pre-programmed calibration value is
automatically written to this register during chip reset, giving the Factory calibrated frequency as
specified in Table 28-2 on page 329. The application software can write this register to change
the oscillator frequency. The oscillator can be calibrated to frequencies as specified in Table 28-
2 on page 329. Calibration outside that range is not guaranteed.
Bit
765
4321
0
CAL7
CAL6
CAL5
CAL4
CAL3
CAL2
CAL1
CAL0
OSCCAL
Read/Write
R/W
Initial Value
Device Specific Calibration Value
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